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Freescale Semiconductor Electronic Components Datasheet

SPC5634M Datasheet

microcontroller units (MCUs)

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Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5634M
Rev. 4, 12/2009
MPC5634M
144 LQFP
20 mm x 20 mm
208 MAPBGA
17 mm x 17 mm
MPC5634M Microcontroller
Data Sheet
176 LQFP
24 mm x 24 mm
• Operating Parameters
– Fully static operation, 0 MHz - 80 MHz (plus 2%
frequency modulation - 82 MHz)
– -40 °C to 150 °C junction temperature operating range
– Low power design
– Less than 400 mW power dissipation (nominal)
– Designed for dynamic power management of core
and peripherals
– Software controlled clock gating of peripherals
– Low power stop mode, with all clocks stopped
– Fabricated in 90 nm process
– 1.2 V internal logic
• High performance e200z335 core processor
• Advanced microcontroller bus architecture (AMBA)
crossbar switch (XBAR)
• Enhanced direct memory access (eDMA) controller
• Interrupt controller (INTC)
– 191 peripheral interrupt request sources, plus 165
reserved positions
– Low latency—three clocks from receipt of interrupt
request from peripheral to interrupt request to processor
www.DataFSrheeqeut4eUn.ccyomModulating Phase-locked loop (FMPLL)
• Calibration bus interface (EBI) (available only in the
calibration package)
• System integration unit (SIU) centralizes control of pads,
GPIO pins and external interrupts.
• Error correction status module (ECSM) provides
configurable error-correcting codes (ECC) reporting
• Up to 1.5 MB on-chip flash memory
• Up to 94 KB on-chip static RAM
• Boot assist module (BAM) enables and manages the
transition of MCU from reset to user code execution from
internal flash memory, external memory on the calibration
bus or download and execution of code via FlexCAN or
eSCI.
• Periodic interrupt timer (PIT)
– 32-bit wide down counter with automatic reload
– 4 channels clocked by system clock
– 1 channel clocked by crystal clock
• System timer module (STM)
– 32-bit up counter with 8-bit prescaler
– Clocked from system clock
– 4 channel timer compare hardware
• Software watchdog timer (SWT) 32-bit timer
• Enhanced modular I/O system (eMIOS)
– 16 standard timer channels (up to 14 channels connected
to pins in LQFP144)
– 24-bit timer resolution
• Second-generation enhanced time processor unit (eTPU2)
– High level assembler/compiler
– Enhancements to make ‘C’ compiler more efficient
– New ‘engine relative’ addressing mode
• Enhanced queued A/D converter (eQADC)
– 2 independent on-chip RSD Cyclic ADCs
– Up to 34 input channels available to the two on-chip
ADCs
– 4 pairs of differential analog input channels
• 2 deserial serial peripheral interface modules (DSPI)
– SPI provides full duplex communication ports with
interrupt and DMA request support
– Deserial serial interface (DSI) achieves pin reduction by
hardware serialization and deserialization of eTPU,
eMIOS channels and GPIO
• 2 enhanced serial communication interface (eSCI) modules
• 2 FlexCAN modules
• Nexus port controller (NPC) per IEEE-ISTO 5001-2003
standard
• IEEE 1149.1 JTAG controller (JTAGC)
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008, 2009. All rights reserved.
Preliminary—Subject to Change Without Notice


Freescale Semiconductor Electronic Components Datasheet

SPC5634M Datasheet

microcontroller units (MCUs)

No Preview Available !

Table of Contents
1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.2 MPC5634M features . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.3 MPC5634M feature details . . . . . . . . . . . . . . . . . . . . . .11
1.3.1 e200z335 core . . . . . . . . . . . . . . . . . . . . . . . . . .11
1.3.2 Crossbar . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
1.3.3 eDMA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
1.3.4 Interrupt controller . . . . . . . . . . . . . . . . . . . . . . .13
1.3.5 FMPLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
1.3.6 Calibration EBI. . . . . . . . . . . . . . . . . . . . . . . . . .15
1.3.7 SIU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
1.3.8 ECSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
1.3.9 Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
1.3.10 SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
1.3.11 BAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
1.3.12 eMIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
1.3.13 eTPU2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
1.3.14 eQADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
1.3.15 DSPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
1.3.16 eSCI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
1.3.17 FlexCAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
1.3.18 System timers . . . . . . . . . . . . . . . . . . . . . . . . . .24
1.3.19 Software Watchdog Timer (SWT) . . . . . . . . . . .25
1.3.20 Nexus Port Controller . . . . . . . . . . . . . . . . . . . .25
1.3.21 JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
1.4 MPC5634M series architecture. . . . . . . . . . . . . . . . . . .28
1.4.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . .28
1.4.2 Block summary . . . . . . . . . . . . . . . . . . . . . . . . .29
2 Pinout and signal description . . . . . . . . . . . . . . . . . . . . . . . . .29
2.1 144 LQFP pinout (all 144-pin devices) . . . . . . . . . . . . .30
2.2 176 LQFP pinout (MPC5634M) . . . . . . . . . . . . . . . . . .31
2.3 176 LQFP pinout (MPC5633M) . . . . . . . . . . . . . . . . . .32
2.4 MAPBGA208 ballmap (MPC5634M). . . . . . . . . . . . . . .33
2.5 MAPBGA208 ballmap (MPC5633M only) . . . . . . . . . . .34
2.6 Signal summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
2.7 Signal Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
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3.1 Parameter classification. . . . . . . . . . . . . . . . . . . . . . . . 57
3.2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 60
3.3.1 General notes for specifications at maximum
junction temperature. . . . . . . . . . . . . . . . . . . . . 61
3.4 EMI (Electromagnetic Interference) characteristics . . . 64
3.5 Electromagnetic static discharge (ESD) characteristics64
3.6 Power Management Control (PMC) and Power On Reset
(POR) electrical specifications. . . . . . . . . . . . . . . . . . . 65
3.6.1 Regulator example . . . . . . . . . . . . . . . . . . . . . . 69
3.6.2 Recommended power transistors. . . . . . . . . . . 69
3.7 Power up/down sequencing. . . . . . . . . . . . . . . . . . . . . 70
3.8 DC electrical specifications . . . . . . . . . . . . . . . . . . . . . 70
3.9 I/O Pad current specifications . . . . . . . . . . . . . . . . . . . 77
3.9.1 I/O pad VRC33 current specifications . . . . . . . 78
3.9.2 LVDS pad specifications. . . . . . . . . . . . . . . . . . 80
3.10 Oscillator and PLLMRFM electrical characteristics . . . 81
3.11 Temperature sensor electrical characteristics . . . . . . . 83
3.12 eQADC electrical characteristics . . . . . . . . . . . . . . . . . 83
3.13 Platform flash controller electrical characteristics . . . . 84
3.14 Flash memory electrical characteristics . . . . . . . . . . . 85
3.15 AC Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
3.15.1 Pad AC specifications. . . . . . . . . . . . . . . . . . . . 86
3.16 AC timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
3.16.1 IEEE 1149.1 interface timing . . . . . . . . . . . . . . 90
3.16.2 Nexus timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 93
3.16.3 Calibration bus interface timing . . . . . . . . . . . . 96
3.16.4 eMIOS timing . . . . . . . . . . . . . . . . . . . . . . . . . . 99
3.16.5 DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
3.16.6 eQADC SSI timing . . . . . . . . . . . . . . . . . . . . . 105
4 Mechanical outline drawings . . . . . . . . . . . . . . . . . . . . . . . . 105
4.1 144 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
4.2 176 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
4.3 208 MAPBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
6 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . 116
MPC5634M Microcontroller Data Sheet, Rev. 4
2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor


Part Number SPC5634M
Description microcontroller units (MCUs)
Maker Freescale Semiconductor
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