Description
MIPS at 120MHz 24K x 16-bit Program SRAM 24K x 16-bit Data SRAM 1K x 16-bit Boot ROM Access up to 2M words of program memory or 8M words of data memory Chip Select Logic for glueless interface to ROM and SRAM Six (6) independent channels of DMA Enhanced Synchronous Serial Interface (ESSI) Two (2) Serial Communication Interfaces (SCI) General Purpose 16-bit Quad Timer with 1 external pin JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging Computer Operating Properly (COP)/Watchdog Timer Time-of-Day (TOD) 100 LQFP package Up to 18 GPIO Memory Program Memory 24,576 x 16 SRAM Boot ROM 1024 x 16 ROM Data Memory 24,576 x 16 SRAM 6 JTAG/ Enhanced OnCE VDDIO 10 VDD 4 VSSIO 10 VSS VDDA 4 VSSA 16-Bit DSP56800E Core Program Controller and Hardware Looping Unit.
