FQP4P40 Datasheet | Fairchild Semiconductor

Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and mutation mode. These devices are well suited for electronic lamp ballast based on plimentary half bridge. Features - - - - - - -3.5A, -400V, RDS(on) = 3.1Ω @VGS = -10 V Low gate charge ( typical 18 n C) Low Crss ( typical 11 p F) Fast switching 100% avalanche tested Improved dv/dt capability ! - - G! ▶ ▲ - G DS TO-220 FQP Series ! Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) FQP4P40 -400 -3.5 -2.2 -14 ± 30 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V m J A m J V/ns W W/°C °C °C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) 260 -3.5 8.5 -4.5 85 0.68 -55 to +150 300 - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC RθCS RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Thermal Resistance, Junction-to-Ambient Typ -0.5 -Max 1.47 -62.5 Units °C/W °C/W °C/W ©2000 Fairchild Semiconductor International Rev. A, August 2000 Elerical Characteristics Symbol Parameter TC = 25°C unless otherwise noted Test...