FM34W02U Datasheet | Fairchild Semiconductor

Description The FM34W02U is 2048 bits of CMOS non-volatile electrically erasable memory. This device is specifically designed to support Serial Presence Detect circuitry in memory modules. This munications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s). The contents of the non-volatile memory allows the CPU to determine the capacity of the module and the electrical characteristics of the memory devices it contains. This will enable "plug and play" capability as the module is read and PC main memory resources utilized through the memory controller. The first 128 bytes of the memory of the FM34W02U can be permanently Write Protected by writing to the "WRITE PROTECT" Register. Write Protect implementation details are described under the section titled Addressing the WP Register. The FM34W02U is available in a JEDEC standard TSSOP package for low profile memory modules for systems requiring efficient space utilization such as in a notebook puter. Two options are available: L - Low Voltage and LZ - Low Power, allowing the part to be used in systems where battery life is of primary importance. Features I PC100/PC133 pliant I Extended Operating Voltage: 2.7V-5.5V I Software Write-Protection for first 128 bytes I Hardware Write-Protection for entire memory array I 200 µA active current typical - 1.0 µA standby current typical (L) - 0.1 µA standby current typical (LZ) I IIC patible interface - Provides bidirectional data transfer protocol I Sixteen byte page write mode - Minimizes total write time per byte I Self timed write cycle - Typical write cycle time of 6ms I Endurance: 1,000,000 data changes I Data retention greater than 40 years I Packages available: 8-pin TSSOP and 8-pin SO I Temperature Ranges: mercial and Extended Block Diagram VCC VSS WP START CYCLE SDA START STOP LOGIC CONTROL LOGIC SLAVE ADDRESS REGISTER & PARATOR LOAD A2 A1 A0 WORD ADDRESS...