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Fairchild Semiconductor Electronic Components Datasheet

FDP603AL Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

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April 1998
FDP603AL / FDB603AL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance. These devices are particularly suited for low
voltage applications such as DC/DC converters and high
efficiency switching circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
Features
33
A,
30
V.
RDS(ON)
RDS(ON)
=
=
0.022
0.036
@
@
VGS=10 V
VGS=4.5 V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
High density cell design for extremely low RDS(ON).
175°C maximum junction temperature rating.
_________________________________________________________________________________
D
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter
FDP603AL
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
(Note 1)
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
THERMAL CHARACTERISTICS
RθJC Thermal Resistance, Junction-to-Case
RθJA Thermal Resistance, Junction-to-Ambient
30
±20
33
100
50
0.33
-65 to 175
275
FDB603AL
3
62.5
© 1998 Fairchild Semiconductor Corporation
Units
V
V
A
W
W/°C
°C
°C
°C/W
°C/W
FDP603AL Rev.D


Fairchild Semiconductor Electronic Components Datasheet

FDP603AL Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

No Preview Available !

Electrical Characteristics TC = 25°C unless otherwise noted)
Symbol Parameter
Conditions
DRAIN-SOURCE AVALANCHE RATINGS (Note 1)
W DSS
Single Pulse Drain-Source Avalanche Energy
IAR Maximum Drain-Source Avalanche Current
OFF CHARACTERISTICS
VDD = 15 V, ID = 12 A
BVDSS
Drain-Source Breakdown Voltage
BVDSS/TJ Breakdown Voltage Temp. Coefficient
IDSS Zero Gate Voltage Drain Current
IGSSF Gate - Body Leakage, Forward
IGSSR Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 1)
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25 oC
VDS = 24 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
VGS(th)
VGS(th)/TJ
RDS(ON)
Gate Threshold Voltage
Gate Threshold Voltage Temp.Coefficient
Static Drain-Source On-Resistance
ID(on) On-State Drain Current
ID(on) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
VDS = VGS, ID = 250 µA
ID = 250 µA, Referenced to 25 oC
VGS = 10 V, ID = 25 A
VGS = 4.5 V, ID = 10 A
VGS = 10 V, VDS = 10 V
VGS = 4.5 V, VDS = 10 V
VDS = 10 V, ID = 25 A
TJ =125 °C
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 1)
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
tD(on) Turn - On Delay Time
tr Turn - On Rise Time
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
DRAIN-SOURCE DIODE CHARACTERISTICS
VDD = 15 V, ID = 25 A
VGS = 10 V, RGEN = 24
VDS = 10 V
ID = 25 A, VGS = 10 V
IS Maximum Continuos Drain-Source Diode Forward Current
VSD Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 25 A (Note 1)
TJ = 125°C
Note
1. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
Min Typ Max Unit
100 mJ
12 A
30
32
V
mV/oC
10 µA
100 nA
-100 nA
1 1.8 3
V
-4.5 mV/oC
0.018 0.022
0.026 0.035
0.03 0.036
60 A
15 A
24 S
670 pF
345 pF
95 pF
8 16
102 140
20 36
80 115
19 26
3.5
5.5
nS
nS
nS
nS
nC
nC
nC
25
1 1.3
0.85 1.1
A
V
FDP603AL Rev.D


Part Number FDP603AL
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Maker Fairchild Semiconductor
Total Page 4 Pages
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