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Fairchild Semiconductor Electronic Components Datasheet

FDN5618P Datasheet

60V P-Channel Logic Level PowerTrench MOSFET

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July 2000
PRELIMINARY
FDN5618P
60V P-Channel Logic Level PowerTrenchMOSFET
General Description
This 60V P-Channel MOSFET uses Fairchild’s high
voltage PowerTrench process. It has been optimized for
power management applications.
Applications
DC-DC converters
Load switch
Power management
Features
–1.25 A, –60 V. RDS(ON) = 0.170 @ VGS = –10 V
RDS(ON) = 0.230 @ VGS = –4.5 V
Fast switching speed
High performance trench technology for extremely
low RDS(ON)
DD
S
SuperSOTTM-3
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
(Note 1a)
– Pulsed
Maximum Power Dissipation
PD
(Note 1a)
(Note 1b)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
618
FDN5618P
7’’
GS
Ratings
–60
±20
–1.25
–10
0.5
0.46
–55 to +150
250
75
Tape width
8mm
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
3000 units
2000 Fairchild Semiconductor Corporation
FDN5618P Rev B(W)


Fairchild Semiconductor Electronic Components Datasheet

FDN5618P Datasheet

60V P-Channel Logic Level PowerTrench MOSFET

No Preview Available !

Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
BVDSS
===TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
Gate–Body Leakage, Forward
IGSSR
Gate–Body Leakage, Reverse
VGS = 0 V, ID = –250 µA
ID = –250 µA,Referenced to 25°C
-60
VDS = –48 V,
VGS = 20V,
VGS = –20 V
VGS = 0 V
VDS = 0 V
VDS = 0 V
V
–58 mV/°C
–1
100
–100
µA
nA
nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
===TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS Forward Transconductance
VDS = VGS, ID = –250 µA
–1 –1.6 –3
V
ID = –250 µA,Referenced to 25°C
4
mV/°C
VGS = –10 V, ID = –1.25 A
VGS = –4.5 V, ID = –1.0 A
VGS = –10 V, ID = –3 A TJ=125°C
VGS = –10 V, VDS = –5 V
VDS = –5 V,
ID = –1.25 A
0.148 0.170
0.185 0.230
0.245 0.315
–5
4.3
A
S
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
VDS = –30 V,
f = 1.0 MHz
V GS = 0 V,
430 pF
52 pF
19 pF
Switching Characteristics
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
(Note 2)
VDD = –30 V,
VGS = –10 V,
ID = –1 A,
RGEN = 6
VDS = –30 V,
VGS = –10 V
ID = –1.25 A,
6.5
8
16.5
4
8.6
1.5
1.3
13
16
30
8
13.8
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = –0.42 (Note 2)
–0.42
–0.7 –1.2
A
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 250°C/W when mounted on a
0.02 in2 pad of 2 oz. copper.
b) 270°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width =300 µs, Duty Cycle =2.0
FDN5618P Rev B(W)


Part Number FDN5618P
Description 60V P-Channel Logic Level PowerTrench MOSFET
Maker Fairchild Semiconductor
Total Page 8 Pages
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