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Fairchild Semiconductor Electronic Components Datasheet

FDN340P Datasheet

Single P-Channel / Logic Level / PowerTrench MOSFET

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September 200
February 2007
FDN340P
SingleP-Channel, LogicLevel, PowerTrench® MOSFET
GeneralDescription
This P-Channel Logic Level MOSFET is produced
usingFairchildSemiconductor advancedPower Trench
process that has been especially tailored to minimize
the on-state resistance and yet maintain low gate
charge for superior switchingperformance.
These devicesare well suited for portable electronics
applications:load switching and power management,
batterychargingcircuits,andDC/DC conversion.
Features
–2A,20 V
RDS(ON)=70 m@ VGS =–4.5 V
RDS(ON)=110 m@ VGS =–2.5 V
Low gate charge (7.2 nC typical).
Highperformance trenchtechnology for extremely
low RDS(ON).
Highpower versionofindustryStandardSOT-23
package. Identical pin-out to SOT-23with30%
higher power handlingcapability.
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AbsoluteM axim um Ratings TA=25oC unlessotherwise noted
Sym bol
VDSS
V GSS
ID
PD
TJ,TSTG
Param eter
Drain-Source Voltage
Gate-Source Voltage
DrainCurrent – Continuous
(Note 1a)
– Pulsed
Power Dissipationfor Single Operation
(Note 1a)
(Note 1b)
OperatingandStorage JunctionTemperature Range
Therm alCharacteristics
RθJA Thermal Resistance,Junction-to-Ambient
RθJC Thermal Resistance,Junction-to-Case
(Note 1a)
(Note 1)
PackageMarking and Ordering Inform ation
Device M arking
Device
ReelSize
340
FDN340P
7’’
©2007 Fairchild Semiconductor Corporation
D
GS
Ratings
–20
±8
–2
–10
0.5
0.46
–55 to +150
250
75
Tape width
8mm
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
3000 units
FDN340P Rev E1


Fairchild Semiconductor Electronic Components Datasheet

FDN340P Datasheet

Single P-Channel / Logic Level / PowerTrench MOSFET

No Preview Available !

Electrical Characteristics
Symbol
Parameter
TA =25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage
BV DSS
TJ
Breakdown Voltage Temperature
Coefficient
IDSS Zero Gate Voltage Drain Current
IGSSF
IGSSR
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
On Characteristics (Note 2)
V GS(th)
Gate Threshold Voltage
V GS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on) On–State Drain Current
gFS Forward Transconductance
Dynamic Characteristics
600 Input Capacitance
175 Output Capacitance
80 Reverse Transfer Capacitance
VGS = 0 V, ID = –250 µA
–20
ID = –250 µA,Referenced to 25°C
VDS = –16 V, VGS = 0 V
VDS = –16 V, VGS = 0 V,TJ=55°C
VGS = 8 V,
VDS = 0 V
VGS = –8 V, VDS = 0 V
V
–12 mV/°C
–1
–10
100
–100
µA
nA
nA
VDS = VGS, ID = –250 µA
–0.4
ID = –250 µA,Referenced to 25°C
VGS = –4.5 V, ID = –2 A
VGS = –4.5 V, ID = –2 A,TJ=125°C
VGS= –2.5 V, ID = –1.7A,
VGS = –4.5 V, VDS = –5 V
VDS = –4.5 V, ID = –2 A
–5
–0.8
3
60
77
82
9
–1.5
70
120
110
V
mV/°C
m
A
S
VDS = –10 V, V GS = 0 V,
f = 1.0 MHz
779 pF
121 pF
56 pF
Switching Characteristics
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
(Note 2)
VDD = –10 V, ID = –1 A,
VGS = –4.5 V, RGEN = 6
VDS = –10V, ID = –3.5 A,
VGS = –4.5 V
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = –0.42 A (Note 2)
10 20
9 10
27 43
11 20
7.2 10
1.7
1.5
ns
ns
ns
ns
nC
nC
nC
–0.42
–0.7 –1.2
A
V
Notes:
1. RθJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCAis determined by the user's board design.
a. 250°C/W when mounted on a
0.02in2 pad of 2 oz copper
b. 270°C/W when mounted on a
.001 in2 pad of 2 oz copper
Scale 1 : 1 on letter size paper
2.Pulse Test: Pulse Width <300µs, Duty Cycle <2.0%
FDN340P Rev E1


Part Number FDN340P
Description Single P-Channel / Logic Level / PowerTrench MOSFET
Maker Fairchild Semiconductor
Total Page 5 Pages
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