FDMS3660S Datasheet | Fairchild Semiconductor

Features Q1: N-Channel - Max r DS(on) = 8 mΩ at VGS = 10 V, ID = 13 A - Max r DS(on) = 11 mΩ at VGS = 4.5 V, ID = 11 A Q2: N-Channel - Max r DS(on) = 1.8 mΩ at VGS = 10 V, ID = 30 A - Max r DS(on) = 2.2 mΩ at VGS = 4.5 V, ID = 27 A - Low inductance packaging shortens rise/fall times, resulting in lower switching losses - MOSFET integration enables optimum layout for lower circuit inductance and reduced switch node ringing - Ro HS pliant February 2015 General Description This device includes two specialized N-Channel MOSFETs in a dual PQFN package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous Sync FETTM (Q2) have been designed to provide optimal power efficiency. Applications - puting - munications - General Purpose Point of Load - Notebook VCORE Pin 1 Pin 1 G1 D1 D1 D1 D1 S2 5 Q2 4 D1 PHASE (S1/D2) G2 S2 S2 S2 Top Power 56 Bottom S2 6 S2 7 G2 8 PHASE 3 D1 2 D1 Q1 1 G1 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS...