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Fairchild Semiconductor Electronic Components Datasheet

FDG6320C Datasheet

Dual N & P Channel Digital FET

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November 1998
FDG6320C
Dual N & P Channel Digital FET
General Description
These dual N & P-Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. This device has been designed
especially for low voltage applications as a replacement for
bipolar digital transistors and small signal MOSFETS. Since
bias resistors are not required, this dual digital FET can
replace several different digital transistors, with different bias
resistor values.
Features
N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 @ VGS= 4.5 V,
RDS(ON) = 5.0 @ VGS= 2.7 V.
P-Ch -0.14 A, -25V, RDS(ON) = 10 @ VGS= -4.5V,
RDS(ON) = 13 @ VGS= -2.7V.
Very small package outline SC70-6.
Very low level gate drive requirements allowing direct
operation in 3 V circuits (VGS(th) < 1.5 V).
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
SC70-6
SOT-23
SuperSOTTM-6
SOT-8
SO-8
SOIC-14
S2
G2
D1 .20
pin 1
SC70-6
D2
G1
S1
16
25
34
Absolute Maximum Ratings TA = 25oC unless other wise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
PD
TJ,TSTG
ESD
Maximum Power Dissipation
(Note 1)
Operating and Storage Temperature Ranger
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1)
N-Channel
25
8
0.22
0.65
0.3
-55 to 150
6
415
P-Channel
-25
-8
-0.14
-0.4
Units
V
V
A
W
°C
kV
°C/W
© 1998 Fairchild Semiconductor Corporation
FDG6320C Rev. D


Fairchild Semiconductor Electronic Components Datasheet

FDG6320C Datasheet

Dual N & P Channel Digital FET

No Preview Available !

Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol
Parameter
Conditions
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
BVDSS/TJ Breakdown Voltage Temp. Coefficient
IDSS Zero Gate Voltage Drain Current
IDSS Zero Gate Voltage Drain Current
IGSS Gate - Body Leakage Current
ON CHARACTERISTICS (Note 2)
VGS = 0 V, ID = 250 µA
VGS = 0 V, ID = -250 µA
ID = 250 µA, Referenced to 25 oC
ID = -250 µA, Referenced to 25 oC
VDS = 20 V, VGS = 0 V,
TJ = 55°C
VDS =-20 V, VGS = 0 V,
TJ = 55°C
VGS = 8 V, VDS = 0 V
VGS = -8 V, VDS = 0 V
VGS(th)
Gate Threshold Voltage
VGS(th)/TJ Gate Threshold Voltage Temp. Coefficient
RDS(ON)
Static Drain-Source On-Resistance
ID(ON) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
VDS = VGS, ID = 250 µA
VDS = VGS, ID = -250 µA
ID = 250 µA, Referenced to 25 oC
ID = -250 µA, Referenced to 25 oC
VGS = 4.5 V, ID = 0.22 A
TJ =125°C
VGS = 2.7 V, ID = 0.19 A
VGS = -4.5 V, ID = -0.14 A
TJ =125°C
VGS = -2.7 V, ID = -0.05 A
VGS = 4.5 V, VDS = 5 V
VGS = -4.5 V, VDS = -5 V
VDS = 5 V, ID = 0.22 A
VDS = -5 V, ID = -0.14 A
N-Channel
VDS = 10 V, VGS = 0 V,
f = 1.0 MHz
P-Channel
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
Type Min Typ
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
25
-25
25
-19
P-Ch
N-Ch
P-Ch
N-Ch 0.65 0.85
P-Ch -0.65 -0.82
N-Ch
-2.1
P-Ch
2.1
N-Ch
2.6
5.3
3.7
P-Ch
7.3
11
10.4
N-Ch 0.22
P-Ch -0.14
N-Ch
0.2
P-Ch
0.12
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
9.5
12
6
7
1.3
1.5
Max Units
V
mV/oC
1 µA
10
-1 µA
-10
100 nA
-100 nA
1.5 V
-1.5
mV/oC
4
7
5
10
17
13
A
S
pF
FDG6320C Rev. D


Part Number FDG6320C
Description Dual N & P Channel Digital FET
Maker Fairchild Semiconductor
Total Page 12 Pages
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