Datasheet Details
| Part number | FDG6320C |
|---|---|
| Manufacturer | Fairchild (now onsemi) |
| File Size | 196.28 KB |
| Description | Dual N & P Channel Digital FET |
| Datasheet |
 FDG6320C Datasheet
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General Description
These dual N & P-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.
This very high density process is especially tailored to minimize on-state resistance.
Key Features
- N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 Ω @ VGS= 4.5 V, RDS(ON) = 5.0 Ω @ VGS= 2.7 V. P-Ch -0.14 A, -25V, RDS(ON) = 10 Ω @ VGS= -4.5V, RDS(ON) = 13 Ω @ VGS= -2.7V. Very small package outline SC70-6. Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V). Gate-Source Zener for ESD ruggedness (>6kV Human Body Model). SC70-6 SOT-23 SuperSOTTM-6 SOT-8 SO-8 SOIC-14 S2 G2 D1 1 6 .20 G1 D2 2 5 SC70-6 pin 1 S1 3 4 Absolute Maximum Ratings Symbol VDS.
