DM74LS47 Datasheet | Fairchild Semiconductor

Description The DM74LS47 accepts four lines of BCD (8421) input data, generates their plements internally and decodes the data with seven AND/OR gates having open-collector outputs to drive indicator segments directly. Each segment output is guaranteed to sink 24 m A in the ON (LOW) state and withstand 15V in the OFF (HIGH) state with a maximum leakage current of 250 µA. Auxiliary inputs provided blanking, lamp test and cascadable zero-suppression functions. Features s Open-collector outputs s Drive indicator segments directly s Cascadable zero-suppression capability s Lamp test input Ordering Code: Order Number DM74LS47M DM74LS47N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram VCC = Pin 16 GND = Pin 8 Pin Descriptions Pin Names A0- A3 RBI LT BI/RBO a - g BCD Inputs Ripple Blanking Input (Active LOW) Lamp Test Input (Active LOW) Blanking Input (Active LOW) or Ripple Blanking Output (Active LOW) Segment Outputs (Active LOW) (Note 1) Note 1: OC- Open Collector Description © 2000 Fairchild Semiconductor Corporation DS009817 .fairchildsemi. Truth Table Decimal or Function 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BI RBI LT LT H H H H H H H H H H H H H H H H X H L RBI H X X X X X X X X X X X X X X X X L X A3 L L L L L L L L H H H H H H H H X L X Inputs A2 L L L L H H H H L L L L H H H H X L X A1 L L H H L L H H L L H H L L H H X L X A0 L H L H L H L H L H L H L H L H X L X BI/RBO H H H H H H H H H H H H H H H H L L H a L H L L H L H L L L H H H L H H H H L b L L L L L H H L L L H H L H H H H H L c L L H L L L L L L L H L H H H H H H L Outputs d L H L L H L L H L H L L H L L H H H L e L H L H H H L H L H L H H H L H H H L f L H H H L L L H L L H H L L L H H H L g H H L L L L L H L...