Revised March 2000
3-STATE Octal Bus Transceiver
This advanced Schottky device contains 8 pairs of 3-
STATE logic elements configured as octal bus transceiver.
This circuit is designed for use in memory, microprocessor
systems and in asynchronous bidirectional data buses.
This device transmits data from the A bus to the B bus, or
vice versa, depending upon the logic level of the direction
control input (DIR). The enable input (G) can be used to
disable the devices, effecting isolation of buses A and B.
The 3-STATE circuitry also contains a protection feature
that prevents these transceivers from glitching the bus dur-
ing power-up or power-down.
s Switching specifications at 50 pF
s Switching specifications guaranteed over full tempera-
ture and VCC range
s Advanced oxide-isolated, ion-implanted Schottky TTL
s Functionally and pin for pin compatible with Schottky,
low power Schottky, and advanced low power Schottky
s Improved AC performance over Schottky, low power
Schottky, and advanced low power Schottky counter-
s 3-STATE outputs independently controlled on A and B
s Low output impedance drive to drive terminated trans-
mission lines to 133Ω
s Specified to interface with CMOS at VOH = VCC − 2V
Order Number Package Number
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
H = HIGH Logic Level
L = LOW Logic Level
X = Immaterial
B Data to A Bus
A Data to B Bus
© 2000 Fairchild Semiconductor Corporation DS006708