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CD4027BCM, CD4027BC Dual J-K Master/Slave Flip-Flop

CD4027BCM Description

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset October 1987 Revised January 1999 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and .
The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transi.

CD4027BCM Features

* s Wide supply voltage range: s High noise immunity: 3.0V to 15V 0.45 VDD (typ. ) s Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS s Low power: 50 nW (typ. ) s Medium speed operation: 12 MHz (typ. ) with 10V supply Ordering Code: Order Number CD4027BCM CD4027BCN Package Number

CD4027BCM Applications

* Ripple Binary Counters Shift Registers www. fairchildsemi. com 4 CD4027BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body Package Number M16A 5 www. fairchildsemi. com CD4027BC Dual J-K Master/Slav

📥 Download Datasheet

This datasheet PDF includes multiple part numbers: CD4027BCM, CD4027BC. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
CD4027BCM, CD4027BC
Manufacturer
Fairchild Semiconductor
File Size
56.43 KB
Datasheet
CD4027BC-FairchildSemiconductor.pdf
Description
Dual J-K Master/Slave Flip-Flop
Note
This datasheet PDF includes multiple part numbers: CD4027BCM, CD4027BC.
Please refer to the document for exact specifications by model.

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📌 All Tags

Dual J-K Master Slave Flip-Flop Fairchild Semiconductor
Fairchild Semiconductor CD4027BCM-like datasheet