CD4027BC flip-flop equivalent, dual j-k master/slave flip-flop.
s Wide supply voltage range: s High noise immunity: 3.0V to 15V 0.45 VDD (typ.) s Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS s Low power: 50 .
Ripple Binary Counters
Shift Registers
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CD4027BC
Physical Dimensions inches (millimeters) un.
The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent J, K, set, reset, and clock inputs and buffered Q and Q output.
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