Datasheet4U Logo Datasheet4U.com

74LVX00 - Low Voltage Quad 2-Input NAND Gate

General Description

The LVX00 contains four 2-input NAND gates.

The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Key Features

  • s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74LVX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE STMicroelectronics
74LVX05 Low voltage CMOS HEX inverter STMicroelectronics
74LVX08 LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE STMicroelectronics
74LVX125 LOW VOLTAGE QUAD BUS BUFFERS STMicroelectronics
74LVX125 Low-Voltage Quad Buffer National Semiconductor

Other Datasheets by Fairchild (onsemi)

Part Number Description
74LVX02 Low Voltage Quad 2-Input NOR Gate
74LVX04 Low Voltage Hex Inverter
74LVX08 Low Voltage Quad 2-Input AND Gate
74LVX112 Low Voltage Dual J-K Flip-Flops
74LVX125 Low Voltage Quad Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74LVX00 Low Voltage Quad 2-Input NAND Gate February 1993 Revised March 1999 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Features s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number 74LVX00M 74LVX00SJ 74LVX00MTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.