Revised August 2001
Low Voltage 16-Bit Transparent Latch with Bushold
The LCXH16373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear transparent to the data when the Latch Enable (LE)
is HIGH. When LE is LOW, the data that meets the setup
time is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCXH16373 is designed for low voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
The LCXH16373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
The LCXH16373 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data input at a valid logic level.
I 5V tolerant control inputs and outputs
I 2.3V–3.6V VCC specifications provided
I 5.4 ns tPD max (VCC = 3.3V), 20 µA ICC max
I Bushold on inputs eliminates the need for external
I Power down high impedance outputs
I ±24 mA output drive (VCC = 3.0V)
I Implements patented noise/EMI reduction circuitry
I Latch-up performance exceeds 500 mA
I ESD performance:
Human body model > 2000V
Machine model > 200V
I Also available in plastic Fine-Pitch Ball Grid Array
Order Number Package Number
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1: BGA package available in Tape and Reel only.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2001 Fairchild Semiconductor Corporation DS500440