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74AC109 - Dual JK Positive Edge-Triggered Flip-Flop

Download the 74AC109 datasheet PDF. This datasheet also covers the 74AC variant, as both devices belong to the same dual jk positive edge-triggered flip-flop family and are provided as variant models within a single manufacturer datasheet.

General Description

The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops.

The clocking operation is independent of rise and fall times of the clock waveform.

Key Features

  • ICC reduced by 50%.
  • Outputs source/sink 24mA.
  • ACT109 has TTL-compatible inputs tm General.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74AC-T109.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Fairchild (onsemi)

Part Number Description
74AC10 Triple 3-Input NAND Gate
74AC11 Triple 3-Input AND Gate
74AC125 Quad Buffer
74AC138 1-of-8 Decoder/Demultiplexer
74AC139 Dual 1-of-4 Decoder/Demultiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop March 2007 74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs tm General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecting the J and K inputs together.