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P-Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
D
BVDSS
-60V
RDSON (MAX.)
150mΩ
ID
-2.2A
G
S Pb-Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
Gate-Source Voltage
VGS
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C ID
TA = 70 °C
IDM
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
PD Tj, Tstg
EMBA5P06J
LIMITS ±20 -2.2 -1.4 -8.8 1.25 0.8
-55 to 150
UNIT V
A
W °C
THERMAL RESISTANCE RATINGS THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
Junction-to-Ambient3
RθJA
100
Junction-to-Lead4
RθJL
55
1Pulse width limited by maximum junction temperature.
EMBA5P06J Datasheet
