XRT81L27 Datasheet | Exar

áç NOVEMBER 2001 SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY REV. 1.1.0 GENERAL DESCRIPTION The XRT81L27 is an optimized seven-channel, analog, 3.3V, line interface unit, fabricated using low power CMOS technology. The device contains seven independent E1 channels, including data and clock recovery circuits. It is primarily targeted towards the SDH multiplexers that acmodate TU12 Tributary Unit Frames. Line cards in these units multiplex 21 E1 channels into higher SDH rates. Devices with seven E1 interfaces such as the XRT81L27 provide the most efficient method of implementing 21-channel line cards. Each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. The receiver input accepts transformer or capacitor coupled signals, while the transmitter is coupled to the line using a 1:2 step-up transformer. The same transformer configuration can be used for both balanced 120 Ω and unbalanced 75 Ω interfaces. The Receiver Loss of Original Detection is pliant to G.775 and in Host Mode, the number of zeros received before RLOS is declared can be increased to 4096 bits. This feature provides the user with the flexibility to implement RLOS specifications that require greater than G.775 requirements Features - Seven (7) Independent E1 (CEPT) Line Interface Units (Transmitter, Receiver, and Recovery) - Transmit Output Pulses that are pliant with the ITU-T G.703 Pulse Template Requirement for 2.048Mbps (E1) Rates - On-Chip Pulse Shaping for both 75Ω and 120Ω line drivers - Receiver Can Either Be Transformer or Capacitive Coupled to the Line - Detects and Clears LOS (Loss of Signal) Per ITU-T G.775 and ETS 300 233 (programmable from Host) - pliant with the ITU-T G.823 Jitter Tolerance Requirements - 3.3V operation with 5V Input patibility - Low power consumption APPLICATIONS - SDH and l PDH Multiplexers - E1 Digital Cross-Connect Systems - DECT (Digital European Cordless...