EM68916CWQA dram equivalent, 8m x 16 bit ddrii synchronous dram.
* JEDEC Standard Compliant
* JEDEC Standard 1.8V I/O (SSTL_18-compatible)
* Power supplies: VDD & VDDQ = +1.8V ± 0.1V
* Operating temperatue: 0
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Table 3. Ball Descriptions
Symbol CK, CK# Type Input Description
EM68916CWQA
Differential Clock: CK, CK# are driven by the system clock. All SDRAM input signals are sampled on the crossing of positive edge of CK and negative edge of CK#. Output (R.
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