EM63A165 dram equivalent, 16m x 16 bit synchronous dram.
* Fast access time from clock: 4.5/5/5.4 ns
* Fast clock rate: 200/166/143 MHz
* Fully synchronous operation
* Internal pipelined architecture
* 4M wo.
requiring high memory bandwidth and particularly well suited to high performance PC applications.
Table 1. Key Specific.
Table 3. Pin Details
Symbol CLK CKE
BA0,BA1
A0-A12
CS# RAS#
CAS# WE# LDQM, UDQM
Type Input Input
Input
Input Input Input
Input Input Input
Description
Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive.
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