* Fast access time from clock: 5/5.4 ns
* Fast clock rate: 166/143 MHz
* Fully synchronous operation
* Internal pipelined architecture
* 2M word x 16-.

requiring high memory bandwidth and particularly well suited to high performance PC applications. Table1. Key Specifica.

Table 3. Pin Details of EM639165 Symbol CLK CKE BA0,BA1 Type Input Input Input Description Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter .

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