E0C6266
Key Features
- q CMOS LSI 4-bit parallel processing q Clock
- 38.4kHz (Typ.)/500kHz (Max.) (selectable by software) q Instruction set
- 108 instructions q Instruction cycle time
- 130µsec, 182µsec or 312µsec at 38kHz (depending on instruction) 10µsec, 14µsec or 24µsec at 500kHz (depending on instruction) q ROM capacity
- 6,144 × 12 bits q RAM capacity
- 1,024 × 4 bits q Input port
- 12 bits q Output port
- 16 bits q I/O port
- 12 bits q Serial I/O port
- Clock sync.; operating by external clock; start-stop can be set by mask option
