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HM5257165B-75 - 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 16-bit 4-bank/16-Mword 8-bit 4-bank /32-Mword 4-bit 4-bank PC/133/ PC/100 SDRAM

Description

The HM5257165B is a 512-Mbit SDRAM organized as 8388608-word × 16-bit × 4 bank.

The HM5257805B is a 512-Mbit SDRAM organized as 16777216-word × 8-bit × 4 bank.

The HM5257405B is a 512-Mbit SDRAM organized as 33554432-word × 4-bit × 4 bank.

Features

  • 3.3 V power supply Clock frequency: 133 MHz/100 MHz (max) LVTTL interface Single pulsed RAS 4 banks can operate simultaneously and independently Burst read/write operation and burst read/single write operation capability Programmable burst length: 1/2/4/8 2 variations of burst sequence  Sequential (BL = 1/2/4/8)  Interleave (BL = 1/2/4/8) Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and H.

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Datasheet Details

Part number HM5257165B-75
Manufacturer Elpida Memory
File Size 463.46 KB
Description 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 16-bit 4-bank/16-Mword 8-bit 4-bank /32-Mword 4-bit 4-bank PC/133/ PC/100 SDRAM
Datasheet download datasheet HM5257165B-75 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HM5257165B-75/A6 HM5257805B-75/A6 HM5257405B-75/A6 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword × 16-bit × 4-bank/16-Mword × 8-bit × 4-bank /32-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM E0081H10 (1st edition) (Previous ADE-203-1237A (Z)) Jan. 31, 2001 Description The HM5257165B is a 512-Mbit SDRAM organized as 8388608-word × 16-bit × 4 bank. The HM5257805B is a 512-Mbit SDRAM organized as 16777216-word × 8-bit × 4 bank. The HM5257405B is a 512-Mbit SDRAM organized as 33554432-word × 4-bit × 4 bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II. Features • • • • • • • • 3.
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