EBE51UD8AJWA - 512MB Unbuffered DDR2 SDRAM DIMM

Elpida Memory

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Datasheet Details

Part number	EBE51UD8AJWA
Manufacturer	Elpida Memory
File Size	274.18 KB
Description	512MB Unbuffered DDR2 SDRAM DIMM
Datasheet	EBE51UD8AJWA_ElpidaMemory.pdf

EBE51UD8AJWA Product details

Description

Pin name A0 to A13 A10 (AP) BA0, BA1 DQ0 to DQ63 /RAS /CAS /WE /CS0 CKE0 CK0 to CK2 /CK0 to /CK2 DQS0 to DQS7, /DQS0 to /DQS7 DM0 to DM7 SCL SDA SA0 to SA2 VDD VDDSPD VREF VSS ODT0 NC Function Address input Row address Column address Auto precharge Bank select address Data input/output Row address strobe command Column address strobe command Write enable Chip select Clock enable Clock input Differential clock input Input and output data strobe Input mask Clock input for serial PD Data input/outp

Features

Double-data-rate architecture; two data transfers per clock cycle.
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

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Published: Mar 21, 2010 |