EBE21UE8ACFA - 2GB Unbuffered DDR2 SDRAM DIMM

Elpida Memory

EBE21UE8ACFA Datasheet Preview — Preview of EBE21UE8ACFA PDF

Datasheet Details

Part number	EBE21UE8ACFA
Manufacturer	Elpida Memory
File Size	281.85 KB
Description	2GB Unbuffered DDR2 SDRAM DIMM
Datasheet	EBE21UE8ACFA_ElpidaMemory.pdf

EBE21UE8ACFA Product details

Description

Pin name A0 to A13 A10 (AP) BA0, BA1, BA2 DQ0 to DQ63 /RAS /CAS /WE /CS0, /CS1 CKE0, CKE1 CK0 to CK2 /CK0 to /CK2 DQS0 to DQS7, /DQS0 to /DQS7 DM0 to DM7 SCL SDA SA0 to SA2 VDD VDDSPD VREF VSS ODT0, ODT1 NC Function Address input Row address Column address Auto precharge Bank select address Data input/output Row address strobe command Column address strobe command Write enable Chip select Clock enable Clock input Differential clock input Input and output data strobe Input mask Clock input for se

Features

Double-data-rate architecture; two data transfers per clock cycle.
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

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Published: Mar 21, 2010 |