logo

UPD4516161D Datasheet Elpida

Download Datasheet
Elpida · UPD4516161D File Size : 442.43KB · 4 hits

Features and Benefits


• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Dual internal banks controlled by A11
• Byte control by LDQM and UDQM
• Programmable Wrap sequence: Sequential / Interleave
• Programma.

UPD4516161D UPD4516161D UPD4516161D
TAGS
16M
Bit
Synchronous
DRAM
UPD4516161
UPD4516161A
UPD4516161D
Stock and Price
Since 2006. D4U Semicon.   |   Contact Us   |   Privacy Policy