EDW2032BBBG sgram equivalent, 2g bits gddr5 sgram.
* Density: 2G bits
* Organization — 4Mbit x 32 I/O x 16 banks — 8Mbit x 16 I/O x 16 banks
* Package — 170-ball FBGA — Lead-free (RoHS compliant) and Halogen-.
requiring high bandwidth. It contains 2,147,483,648 bits and is internally configured as a 16-bank DRAM.
The GDDR5 SGRAM.
Table 1: Signal Description
Signal CK, /CK
Type Input
WCK01, /WCK01, WCK23, /WCK23
Input
/CKE
Input
/CS Input
/RAS, /CAS, /WE Input
BA0 - BA3
Input
A0 - A12
Input
DQ0 - DQ31 /DBI0 - /DBI3
I/O I/O
EDC0 - EDC3
/ABI ZQ
/RESET
MF SEN VREF.
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