CS18LV02565
DESCRIPTION
The CS18LV02565 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 32,768 words by 8bits and operates for a single 4.5 to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed, super low power features and maximum access time of 55/70ns in 5.0V operation. Easy memory expansion is provided by an active LOW chip enable (/CE) and active LOW output enable (/OE). The CS18LV02565 has an automatic power down feature
, reducing the power consumption significantly when chip is deselected. The CS18LV02565 is available in JEDEC standard 28-pin TSOP I (8x13.4 mm), SOP (330 mil) and PDIP (600 mil) packages.
FEATURES
Wide operation voltage : 4.5 ~ 5.5V Ultra low power consumption : 2m A＠1MHz (Max.) , Vcc=5.0V. 1.0 u A (Typ.) CMOS standby current High speed access time : 55/70ns. Automatic power down when chip is deselected. Three state outputs and TTL patible. Data retention supply voltage as low as...
