M14D5121632A-1.5BG2M sdram equivalent, ddr-ii sdram.
JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V Internal pipelined double-data-rate architecture; two data access per clock cycle Bi-directional differential data st.
Image gallery
TAGS
Download (Size : 1.00MB)