M12L16161A-7TG2R dram equivalent, 512k x 16bit x 2banks synchronous dram.
GENERAL DESCRIPTION
* JEDEC standard 3.3V power supply
The M12L16161A is 16,777,216 bits synchronous high data
* LVTTL compatible with multiplexed address
ra.
* Burst Read Single-bit Write operation
* DQM for masking
ORDERING I.
* JEDEC standard 3.3V power supply
The M12L16161A is 16,777,216 bits synchronous high data
* LVTTL compatible with multiplexed address
rate Dynamic RAM organized as 2 x 524,288 words by 16 bits,
* Dual banks operation
* MRS cycle.
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