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M12L128168A-7BVAG2S Datasheet, ESMT

M12L128168A-7BVAG2S dram equivalent, 2m x 16 bit x 4 banks synchronous dram.

M12L128168A-7BVAG2S Avg. rating / M : 1.0 rating-12

datasheet Download (Size : 1.02MB)

M12L128168A-7BVAG2S Datasheet
M12L128168A-7BVAG2S Avg. rating / M : 1.0 rating-12

datasheet Download (Size : 1.02MB)

M12L128168A-7BVAG2S Datasheet

Features and benefits


* JEDEC standard 3.3V power supply
* LVTTL compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs - CAS Latency .

Description

The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. R.

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TAGS

M12L128168A-7BVAG2S
Bit
Banks
Synchronous
DRAM
ESMT

Manufacturer


ESMT

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