Download 74AUP1G58 Datasheet PDF
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74AUP1G58 Description

The 74AUP1G58 is a single, 3-input positive configurable multiple function gate with a standard push-pull output. The output state is determined by eight patterns of 3-bit input. The user can chose the logic functions AND, OR, NAND, NOR, XOR, inverter or non-inverting buffer.

74AUP1G58 Key Features

  • Advanced Ultra Low-Power (AUP) CMOS
  • Supply Voltage Range from 0.8V to 3.6V
  • ±4mA Output Drive at 3.0V
  • Low Static Power Consumption
  • IC < 0.9µA
  • Low Dynamic Power Consumption
  • CPD = 4.8pF Typical at 3.6V
  • IOFF Supports Partial-Power-Down Mode Operation
  • ESD Protection per JESD 22
  • Exceeds 200-V Machine Model (A115)