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Cypress Semiconductor Electronic Components Datasheet

SM560 Datasheet

Spread Spectrum Clock Generator

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Features
• 25- to 108-MHz operating frequency range
• Wide (9) range of spread selections
• Accepts clock and crystal inputs
• Low power dissipation
• 3.3V = 85 mw (50 MHz)
• Frequency Spread disable function
• Center Spread modulation
• Low cycle-to cycle jitter
• Eight-pin SOIC package
SM560
Spread Spectrum Clock Generator
Applications
• VGA controllers
• LCD panels and monitors
• Printers and multi-function devices (MFP)
Benefits
• Peak electromagnetic interference (EMI) reduction
by 8 to 16 dB
• Fast time to market
• Cost reduction
Block Diagram
250 K
Xin/
CLK
1
4 pf
Xout 8
VDD 2
VSS 3
8 pF
REFERENCE
DIVIDER
MODULATION
CONTROL
INPUT
DECODER
LOGIC
5
SSCC
67
S1 S0
Pin Configuration
PD CP
FEEDBACK
DIVIDER
LF
VCO
Xin/CLK
VDD
VSS
SSCLK
1
2
3
4
DIVIDER
AND MUX
4 SSCLK
8 Xout
7 S0
6 S1
5 SSCC
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07020 Rev. *E
Revised June 25, 2004


Cypress Semiconductor Electronic Components Datasheet

SM560 Datasheet

Spread Spectrum Clock Generator

No Preview Available !

SM560
Pin Definitions
Pin Name
1 Xin/CLK
2 VDD
3 GND
4 SSCLK
5 SSCC
6 S1
7 S0
8 Xout
Type
I
P
P
O
I
I
I
O
Description
Clock or Crystal connection input. Refer to Table 1 for input frequency range selection.
Positive power supply.
Power supply ground.
Modulated clock output.
Spread Spectrum Clock Control (Enable/Disable) function. SSCG function is enabled
when input is high and disabled when input is low. This pin is pulled high internally.
Tri-level Logic input control pin used to select frequency and bandwidth.
Frequency/bandwidth selection and Tri-level Logic programming. See Figure 1.
Tri-level Logic input control pin used to select frequency and bandwidth.
Frequency/bandwidth selection and Tri-level Logic programming. See Figure 1.
Oscillator output pin connected to crystal. Leave this pin unconnected If an external
clock drives Xin/CLK.
Functional Description
The Cypress SM560 is a Spread Spectrum Clock Generator
(SSCG) IC used for the purpose of reducing Electro Magnetic
Interference (EMI) found in today’s high-speed digital
electronic systems.
The SM560 uses a Cypress-proprietary Phase-Locked Loop
(PLL) and Spread Spectrum Clock (SSC) technology to
synthesize and frequency modulate the input frequency of the
reference clock. By frequency modulating the clock, the
measured EMI at the fundamental and harmonic frequencies
of Clock (SSCLK1) is greatly reduced.
This reduction in radiated energy can significantly reduce the
cost of complying with regulatory requirements and time to
market without degrading the system performance.
The SM560 is a very simple and versatile device to use. The
frequency and spread% range is selected by programming S0
and S1digital inputs. These inputs use three (3) logic states
including High (H), Low (L) and Middle (M) logic levels to select
one of the nine available Frequency Modulation and Spread%
ranges. Refer to Table 1 for programming details.
The SM560 is optimized for SVGA (40 MHz) and XVGA (65
MHz) Controller clocks and also suitable for the applications
with the frequency range of 25 to 108 MHz.
A wide range of digitally selectable spread percentages is
made possible by using three-level (High, Low and Middle)
logic at the S0 and S1 digital control inputs.
The output spread (frequency modulation) is symmetrically
centered on the input frequency.
Spread Spectrum Clock Control (SSCC) function enables or
disables the frequency spread and is provided for easy
comparison of system performance during EMI testing.
The SM560 is available in an eight-pin SOIC package with a 0
to 70°C operating temperature range.
Table 1. Frequency and Spread% Selection (Center Spread)
In p u t
Frequency
(M Hz)
25 – 35
35 – 40
40 – 45
45 – 50
50 – 54
In p u t
Frequency
(M Hz)
50 – 60
60 – 70
70 – 80
80 – 100
100 – 108
S1=M
S0=M
(% )
3.8
3.5
3.2
3.0
2.8
S1=1
S0=M
(% )
2.5
2.4
2.3
2.0
1.8
25 – 54 M Hz (Low Range)
S1=M
S0=0
(% )
3.2
3.0
2.8
2.6
2.4
S1=1
S0=0
(% )
2.8
2.5
2.4
2.2
2.0
50 – 108 M Hz (High Range)
S1=0
S0=1
(% )
1.9
1.8
1.6
1.4
1.3
S1=1
S0=1
(% )
1.2
1.1
1.1
1.0
0.8
S1=0
S0=0
(% )
2.3
2.1
1.9
1.8
1.7
S1=M
S0=1
(% )
1.0
0.9
0.9
0.8
0.6
S1=0
S0=M
(% )
1.9
1.7
1.6
1.5
1.4
Select the
Frequency and
Center Spread %
desired and then
set S1, S0 as
indicated.
Select the
Frequency and
Center Spread %
desired and then
set S1, S0 as
indicated.
Document #: 38-07020 Rev. *E
Page 2 of 8


Part Number SM560
Description Spread Spectrum Clock Generator
Maker Cypress Semiconductor
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SM560 Datasheet PDF






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