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PSoC62 - Programmable System-on-Chip

General Description

PSoC® is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with Arm® Cortex® CPUs (single and multi-core).

Key Features

  • 32-bit Dual Core CPU Subsystem.
  • 150-MHz Arm Cortex-M4F CPU with single-cycle multiply (Floating Point and Memory Protection Unit).
  • 100-MHz Cortex M0+ CPU.
  • User-selectable core logic operation at either 1.1 V or 0.9 V.
  • Inter-processor communication supported in hardware.
  • 8 KB 4-way set-associative Instruction Caches for the M4 and M0+ CPUs respectively.
  • Active CPU power consumption sl.

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PSoC61 Programmable System-on-Chip
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PSoC® 6 MCU: PSoC 62 Datasheet Programmable System-on-Chip (PSoC®) General Description PSoC® is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with Arm® Cortex® CPUs (single and multi-core). The PSoC 6 product family, based on an ultra low-power 40-nm platform, is a combination of a dual-core microcontroller with low-power Flash technology and digital programmable logic, high-performance analog-to-digital and digital-to-analog conversion, low-power comparators, and standard communication and timing peripherals. Features 32-bit Dual Core CPU Subsystem ■ 150-MHz Arm Cortex-M4F CPU with single-cycle multiply (Floating Point and Memory Protection Unit) ■ 100-MHz Cortex M0+ CPU ■ User-selectable core logic operation at either 1.