PSoC4100M Datasheet | Cypress

Automotive PSo C® 4: PSo C 4100M Family Datasheet Programmable System-on-Chip (PSo C®) Automotive PSo C® 4: PSo C 4100M Family Datasheet Programmable System-on-Chip (PSo C®) General Description PSo C® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0 CPU, while being AEC-Q100 pliant. It bines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSo C 4100M product family, based on this platform architecture, is a bination of a microcontroller with digital programmable logic, programmable analog, programmable interconnect, high-performance analog-to-digital conversion, opamps with parator mode, and standard munication and timing peripherals. The PSo C 4100M products will be fully patible with members of the PSo C 4 platform for new applications and design needs. The programmable analog and digital subsystems allow flexibility and in-field tuning of the design. Features 32-bit MCU Subsystem - Automotive Electronics Council (AEC) AEC-Q100 qualified - 24-MHz Arm Cortex-M0 CPU with single-cycle multiply - Up to 128 k B of flash with Read Accelerator - Up to 16 k B of SRAM - DMA engine Programmable Analog - Four opamps that operate in Deep Sleep mode at very low current levels - All opamps have reconfigurable high current pin-drive, high-bandwidth internal drive, ADC input buffering, and parator modes with flexible connectivity allowing input connections to any pin - Four current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin - Two low-power parators that operate in Deep Sleep mode - 12-bit SAR ADC with 806-Ksps conversion rate Low Power 1.71 to 5.5 V Operation - 20-n A Stop Mode with GPIO pin wakeup - Hibernate and Deep Sleep modes allow wakeup-time versus power trade-offs Capacitive Sensing - Cypress Capacitive Sigma-Delta (CSD) technique provides best-in-class SNR (>5:1) and water tolerance -...