PSoC4100M
Description
PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0 CPU, while being AEC-Q100 compliant. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.
Key Features
- Automotive Electronics Council (AEC) AEC-Q100 qualified
- 24-MHz Arm Cortex-M0 CPU with single-cycle multiply
- Up to 128 kB of flash with Read Accelerator
- Up to 16 kB of SRAM
- DMA engine Programmable Analog
- Four opamps that operate in Deep Sleep mode at very low current levels
- All opamps have reconfigurable high current pin-drive, high-bandwidth internal drive, ADC input buffering, and Comparator modes with flexible connectivity allowing input connections to any pin
- Four current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
- Two low-power comparators that operate in Deep Sleep mode
- 12-bit SAR ADC with 806-Ksps conversion rate Low Power 1.71 to 5.5 V Operation
