PALCE20V8
Features
- Active pull-up on data input pins
- Low power version (20V8L)
- 55 m A max. mercial (15, 25 ns)
- 65 m A max. military/industrial (15, 25 ns)
- Standard version has low power
- 90 m A max. mercial (15, 25 ns)
- 115 m A max. mercial (10 ns)
- 130 m A max. military/industrial (15, 25 ns)
- CMOS Flash technology for electrical erasability and reprogrammability
- User-programmable macrocell
- Output polarity control
- Individually selectable for registered or binatorial operation
- QSOP package available
- 10, 15, and 25 ns ’l version
- 15, and 25 ns military/industrial versions
- High reliability
- Proven Flash technology
- 100% programming and functional testing
Functional Description
The Cypress PALCE20V8 is a CMOS Flash Erasable second-generation programmable array logic device. It is implemented with the familiar sum-of-product (AND-OR) logic structure and the programmable macrocell. The PALCE20V8 is executed in a 24-pin 300-mil molded DIP, a 300-mil cerdip, a 28-lead square...
