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CY7C4282 - (CY7C4282 / CY7C4292) 64K/128K x 9 Deep Sync FIFOs

Description

The CY7C4282/CY7C4292 are high-speed, low-power, FIFO memories with clocked read and write interfaces.

All devices are nine bits wide.

The CY7C4282/CY7C4292 can be cascaded to increase FIFO depth.

Features

  • High-speed, low-power, first-in first-out (FIFO) memories.
  • 64K × 9 (CY7C4282).
  • 128K × 9 (CY7C4292).
  • 0.5-micron CMOS for optimum speed/power.
  • High-speed, near-zero latency (true dual-ported memory cell), 100-MHz operation (10-ns read/write cycle times).
  • Low power.
  • ICC=40 mA.
  • ISB = 2 mA.
  • Fully asynchronous and simultaneous read and write operation.
  • Empty, Full, and Programmable Almost Empty and Almost Full s.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com CY7C4282 CY7C4292 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion Features • High-speed, low-power, first-in first-out (FIFO) memories • 64K × 9 (CY7C4282) • 128K × 9 (CY7C4292) • 0.
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