CY7C335 epld equivalent, universal synchronous epld.
* 100-MHz output registered operation
* Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock select multiplexe.
The CY7C335 is a high-performance, erasable, programmable logic device (EPLD) whose architecture has been optimized to enable the user to easily and efficiently construct very high performance state machines. The architecture of the CY7C335, consisti.
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