CY7C2561KV18 - 72-Mbit QDR-II SRAM 4-Word Burst Architecture

Cypress (now Infineon)

Datasheet Details

Part number	CY7C2561KV18
Manufacturer	Cypress (now Infineon)
File Size	915.19 KB
Description	72-Mbit QDR-II SRAM 4-Word Burst Architecture
Datasheet	CY7C2561KV18 Datasheet

The CY7C2561KV18, CY7C2576KV18, CY7C2563KV18, and CY7C2565KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II+ architecture.

Similar to QDR-II architecture, QDR-II+ architecture consists of two separate ports: the read port and the write port to access the memory array.

www.DataSheet.co.kr PRELIMINARY CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.

Configurations With Read Cycle Latency of 2.5 cycles: CY7C2561KV18.
8M x 8 CY7C2576KV18.
8M x 9 CY7C2563KV18.
4M x 18 CY7C2565KV18.
2M x 36 Separate independent read and write data ports.
Supports concurrent transactions 550 MHz clock for high bandwidth 4-word burst for reducing address bus frequency Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 1100 MHz) at 550 MHz Available in 2.5 clock cycle latency Two inp.

Part Number	Description
CY7C2562XV18	72-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture
CY7C25632KV18	72-Mbit QDR II+ SRAM Four-Word Burst Architecture
CY7C2563KV18	72-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C2563XV18	72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture
CY7C2564XV18	72-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture
CY7C25652KV18	72-Mbit QDR II+ SRAM Four-Word Burst Architecture
CY7C2565KV18	72-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C2565XV18	72-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture
CY7C25682KV18	72-Mbit DDR II+ SRAM Two-Word Burst Architecture
CY7C25422KV18	72-Mbit QDR II+ SRAM Two-Word Burst Architecture