CY7C197 Datasheet | Cypress

256Kx1 Static RAM Features - High speed - 12 ns - CMOS for optimum speed/power - Low active power - 880 m W - Low standby power - 220 m W - TTL-patible inputs and outputs - Automatic power-down when deselected vided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C197 has an automatic power-down feature, reducing the power consumption by 75% when deselected. Writing to the device is acplished when the Chip Enable (CE) and Write Enable (WE) inputs are both LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A17). Reading the device is acplished by taking chip enable (CE) LOW while Write Enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the data output (DOUT) pin. The output pin stays in a high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW. The CY7C197 utilizes a die coat to insure alpha immunity. Functional Description The CY7C197 is a high-performance CMOS static RAM organized as 256K words by 1 bit. Easy memory expansion is pro- Logic Block Diagram Pin Configurations DIP/SOJ Top View INPUT BUFFER A13 A14 A15 A16 A17 A0 A1 A2 A3 A4 A0 A1 A2 A3 A4 A5 A6 A7 A8 DOUT WE GND 1 24 2 23 3 22 4 21 5 20 7C197 6 19 18 7 8 17 9 16 10 15 14 11 12 13 VCC A17 A16 A15 A14 A13 A12 A11 A10 A9 DIN CE C197-2 CE LCC Top View A2 A1 A0 V CC A 17 NC A3 A4 A5 A6 A7 A8 DOUT NC 3 2 1 28 27 4 26 NC 5 25 A16 6 24 A15 7 23 A14 8 7C197 22 A13 9 21 A12 10 20 A11 11 19 A10 12 18 NC 1314151617 WE GND CE DIN A9 C197-3 ROW DECODER 1024 x 256 ARRAY SENSE AMPS COLUMN DECODER POWER DOWN A5 A6 A7 A8 A9 A10 A11 A12 WE C197-1 Selection Guide 7C197-12 Maximum Access Time (ns) Maximum Operating Current (m A) Maximum Standby Current (m A) 12 150 30 7C197-15 15 140 30 7C197-20 20 135 30 7C197-25 25 95 30 7C197-35 35 95 30 30 7C197-45 45 Cypress Semiconductor Corporation Document #:...