CY7C1520V18 Datasheet 1.8V Synchronous Pipelined SRAM

Manufacturer: Cypress (now Infineon)

Download the CY7C1520V18 datasheet PDF. This datasheet also includes the CY7C1516V18 variant, as both parts are published together in a single manufacturer document.

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CY7C1520V18 1.8v synchronous pipelined sram by Cypress (now Infineon) - Datasheet Preview — Note: The manufacturer provides a single datasheet file (CY7C1516V18-CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number	CY7C1520V18
Manufacturer	Cypress (now Infineon)
File Size	400.92 KB
Description	1.8V Synchronous Pipelined SRAM
Download	CY7C1520V18 Download (PDF)

Overview

CY7C1516V18, CY7C1527V18 CY7C1518V18, CY7C1520V18 72-Mbit DDR-II SRAM 2-Word Burst.

Key Features

72-Mbit density (8M x 8, 8M x 9, 4M x 18, 2M x 36).
300 MHz clock for high bandwidth.
2-word burst for reducing address bus frequency.
Double Data Rate (DDR) interfaces (data transferred at 600 MHz) at 300 MHz.
Two input clocks (K and K) for precise DDR timing.
SRAM uses rising edges only.
Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches.
Echo clocks (CQ and CQ) simplify data capture in high-speed systems.

More Datasheets from Cypress (now Infineon)

Part Number	Description
CY7C1520KV18	72-Mbit DDR-II SRAM Two-Word Burst Architecture
CY7C1521KV18	72-Mbit DDR II SRAM Four-Word Burst Architecture
CY7C1521V18	1.8V Synchronous Pipelined SRAM
CY7C1522AV18	72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1522JV18	72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1522KV18	72-Mbit DDR II SIO SRAM 2-Word Burst Architecture
CY7C1522V18	72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1523AV18	72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1523JV18	72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1523KV18	72-Mbit DDR II SIO SRAM 2-Word Burst Architecture