Datasheet Details
| Part number | CY7C1519V18 |
|---|---|
| Manufacturer | Cypress (now Infineon) |
| File Size | 434.21 KB |
| Description | 1.8V Synchronous Pipelined SRAM |
| Download | CY7C1519V18 Download (PDF) |
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Download the CY7C1519V18 datasheet PDF. This datasheet also includes the CY7C1517V18 variant, as both parts are published together in a single manufacturer document.
| Part number | CY7C1519V18 |
|---|---|
| Manufacturer | Cypress (now Infineon) |
| File Size | 434.21 KB |
| Description | 1.8V Synchronous Pipelined SRAM |
| Download | CY7C1519V18 Download (PDF) |
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• 72-Mbit density (8M x 8, 8M x 9, 4M x 18, 2M x 36) • 300-MHz clock for high bandwidth • 4-Word burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz • Two input clocks (K and K) for precise DDR timing — SRAM uses rising edges only • Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches • Echo clocks (CQ and CQ) simplify data capture in high-speed systems • Synchronous internally self-timed writes • 1.8V core power supply with HSTL inputs and outputs • Variable drive HSTL output buffers • Expanded HSTL output voltage (1.4V–VDD) • Available in 165-ball FBGA package (15 x 17 x 1.4 mm) • Offered in lead-free and non lead-free packages • JTAG 1149.1 compatible test access port • Delay Lock Loop (DLL) for accurate data placement
CY7C1517V18 CY7C1528V18 CY7C1519V18 CY7C1521V18 72-Mbit DDR-II SRAM 4-Word Burst.
| Part Number | Description |
|---|---|
| CY7C1510AV18 | 72-Mbit QDR-II SRAM 2-Word Burst Architecture |
| CY7C1510V18 | 1.8V Synchronous Pipelined SRAM |
| CY7C1511AV18 | 72-Mbit QDR-II SRAM 4-Word Burst Architecture |
| CY7C1511JV18 | 72-Mbit QDR-II SRAM 4-Word Burst Architecture |
| CY7C1511KV18 | (CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture |
| CY7C1511V18 | (CY7C15xxV18) SRAM 4-Word Burst Architecture |
| CY7C1512 | 64K x 8 Static RAM |
| CY7C1512AV18 | 72-Mbit QDR-II SRAM 2-Word Burst Architecture |
| CY7C1512KV18 | 72-Mbit QDR II SRAM Two-Word Burst Architecture |
| CY7C1512V18 | 1.8V Synchronous Pipelined SRAM |