* 72-Mbit density (8M x 8, 8M x 9, 4M x 18, 2M x 36)
* 300 MHz clock for high bandwidth
* 2-word burst for reducing address bus frequency
* Double Data Ra.

CY7C1518KV18

CY7C1510AV18

CY7C1510V18

CY7C1511AV18

CY7C1511JV18

CY7C1511KV18

CY7C1511V18

CY7C1512

CY7C1512AV18

CY7C1512KV18

CY7C1512V18

CY7C1513AV18

CY7C1513JV18

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