Datasheet4U Logo Datasheet4U.com

CY7C1513V18 - (CY7C15xxV18) SRAM 4-Word Burst Architecture

Download the CY7C1513V18 datasheet PDF. This datasheet also covers the CY7C1511V18 variant, as both devices belong to the same (cy7c15xxv18) sram 4-word burst architecture family and are provided as variant models within a single manufacturer datasheet.

Description

The CY7C1511V18, CY7C1526V18, CY7C1513V18, and CY7C1515V18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture.

QDR-II architecture consists of two separate ports to access the memory array.

Features

  • Separate Independent Read and Write Data Ports.
  • Supports concurrent transactions.
  • 250-MHz Clock for High Bandwidth.
  • 4-Word Burst for reducing address bus frequency.
  • Double Data Rate (DDR) interfaces on both Read and Write Ports (data transferred at 500 MHz) at 250 MHz.
  • Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.
  • Two output clocks (C and C) accounts for clock skew and flight time mismatchi.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C1511V18_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C1518AV18 72-Mbit DDR-II SRAM Cypress
CY7C1520AV18 72-Mbit DDR-II SRAM Cypress
CY7C1006D 1-Mbit (256K x 4) Static RAM Cypress
CY7C1011G 2-Mbit (128K words x 16 bit) Static RAM Cypress
CY7C1041G 4-Mbit (256K words x 16 bit) Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C1513AV18 72-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1513JV18 72-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1513KV18 (CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture
CY7C1510AV18 72-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1510V18 1.8V Synchronous Pipelined SRAM

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.
Published: |