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Cypress Semiconductor Electronic Components Datasheet

CY7C150 Datasheet

1Kx4 Static RAM

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50
CY7C150
1Kx4 Static RAM
Features
• Memory reset function
• 1024 x 4 static RAM for control store in high-speed com-
puters
Separate I/O paths eliminates the need to multiplex data in
and data out, providing for simpler board layout and faster sys-
tem performance. Outputs are three-stated during write, reset,
deselect, or when output enable (OE) is held HIGH, allowing
for easy memory expansion.
• CMOS for optimum speed/power
• High speed
— 10 ns (commercial)
— 12 ns (military)
• Low power
Reset is initiated by selecting the device (CS = LOW) and tak-
ing the reset (RS) input LOW. Within two memory cycles all
bits are internally cleared to zero. Since chip select must be
LOW for the device to be reset, a global reset signal can be
employed, with only selected devices being cleared at any giv-
en time.
— 495 mW (commercial)
— 550 mW (military)
• Separate inputs and outputs
5-volt power supply ±10% tolerance in both commercial
and military
Capable of withstanding greater than 2001V static dis-
charge
TTL-compatible inputs and outputs
Writing to the device is accomplished when the chip select
(CS) and write enable (WE) inputs are both LOW. Data on the
four data inputs (D0D3) is written into the memory location
specified on the address pins (A0 through A9).
Reading the device is accomplished by taking chip select (CS)
and output enable (OE) LOW while write enable (WE) remains
HIGH. Under these conditions, the contents of the memory
location specified on the address pins will appear on the four
output pins (O0 through O3).
Functional Description
The output pins remain in high-impedance state when chip
enable (CE) or output enable (OE) is HIGH, or write enable
The CY7C150 is a high-performance CMOS static RAM de- (WE) or reset (RS) is LOW.
signed for use in cache memory, high-speed graphics, and
data-acquisition applications. The CY7C150 has a memory re-
A die coat is used to insure alpha immunity.
set feature that allows the entire memory to be reset in two
memory cycles.
DataSheet4U.com
DataShee
Logic Block Diagram
D0 D1 D2 D3
DATAINPUT
CONTROL
A0
A1
A2 64 x 64
A3 ARRAY
A4
A5
COLCUMONLDUECMONDER
DECODER
RS
CS
OE
WE
O0
O1
O2
O3
C1501
Pin Configuration
A3
A4
A5
A6
A7
A8
A9
D0
D1
O0
O1
GND
DIP/SOIC
Top View
1 24
2 23
3 22
4 21
5 20
6 7C150 19
7 18
8 17
9 16
10 15
11 14
12 13
VCC
A2
A1
A0
RS
CS
WE
OE
D3
D2
O3
O2
C150-2
A6 A7 A8 A9
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
DataSheet4U.com
Commercial
Military
Commercial
Military
7C15010
10
90
7C15012
12
12
90
100
7C15015
15
15
90
100
7C15025
25
25
90
100
7C15035
35
90
100
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05024 Rev. **
Revised August 24, 2001
DataSheet4 U .com


Cypress Semiconductor Electronic Components Datasheet

CY7C150 Datasheet

1Kx4 Static RAM

No Preview Available !

www.DataSheet4U.com
CY7C150
et4U.com
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ......................................−65°C to+150°C
Ambient Temperature with
Power Applied................................................... −55°C to+125°C
Supply Voltage to Ground Potential
(Pin 24 to Pin 12)..................................................−0.5V to+7.0V
DC Voltage Applied to Outputs
in High Z State ......................................................−0.5V to+7.0V
DC Input Voltage .................................................−3.0V to +7.0V
Output Current into Outputs (LOW) .............................20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.................................................... >200 mA
Operating Range
Range
Ambient
Temperature
Commercial
Military[1]
0°C to +70°C
55°C to +125°C
Note:
1. TA is the instant oncase temperature.
VCC
5V ± 10%
5V ± 10%
Electrical Characteristics Over the Operating Range[2]
Parameter
VOH
VOL
VIH
VIL
IIX
IOZ
IOS
ICC
Description
Output HIGH Voltage
Output LOW Current
Input HIGH Level
Input LOW Level
Input Load Current
Output Current (High Z)
Output Short Circuit Current[3]
VCC Operating Supply Current
Test Conditions
VCC = Min., IOH = 0.4 mA
VCC = Min., IOL = 12 mA
GND < VI < VCC
VOL < VOUT < VOH,
Output Disabled
VCDCa=taMSahxe.,eVt4OUUT.c=omGND
VCC = Max.,
Commercial
IOUT = 0 mA
Military
7C150
Min. Max.
2.4
0.4
2.0
3.0
VCC
0.8
10 +10
50 +50
300
90
100
Unit
V
V
V
V
µA
µA
mA
mA
mA
Notes:
2. See the last page of this specification for Group A subgroup testing information.
3. Not more than 1 output should be shorted at a time. Duration of the short circuit should not exceed 30 seconds.
DataShee
Capacitance[4]
Parameter
Description
Test Conditions
CIN
COUT
Input Capacitance
Output Capacitance
TA = 25°C, f = 1 MHz,
VCC = 5.0V
Note:
4. Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
Max.
10
10
Unit
pF
pF
5V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R1329
R2
202
(a)
5V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
R1329
R2
202
(b) C1503
3.0V
GND
10%
< 3 ns
ALL INPUT PULSES
90%
90%
10%
< 3 ns
C1504
Equivalent to:
THÉVENIN EQUIVALENT
OUTPUT
125
1.9V
DataSheet4U.com
Document #: 38-05024 Rev. **
Page 2 of 11
DataSheet4 U .com


Part Number CY7C150
Description 1Kx4 Static RAM
Maker Cypress Semiconductor
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CY7C150 Datasheet PDF






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