logo

CY7C1421AV18 Datasheet Cypress Semiconductor

Download Datasheet
Cypress Semiconductor · CY7C1421AV18 File Size : 434.16KB · 2 hits

Features and Benefits


• 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36)
• 300-MHz clock for high bandwidth
• 4-Word burst for reducing address bus frequency
• Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz
• Two input clocks (K and K) for precise DDR timing — SRAM uses rising edges only
• Tw.

CY7C1421AV18 CY7C1421AV18 CY7C1421AV18
TAGS
1.8V
Synchronous
Pipelined
SRAM
CY7C1421AV18
CY7C142
CY7C1420AV18

Stock and Price

Since 2006. D4U Semicon.   |   Contact Us   |   Privacy Policy