CY7C1380BV25
Features
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- Fast clock speed: 200,166, 150, 133 MHz Provide high-performance 3-1-1-1 access rate Fast OE access times: 3.0,3.2, 3.4, 3.8, 4.2 ns Optimal for depth expansion 2.5V (±5%) Operation mon data inputs and data outputs Byte Write Enable and Global Write control Chip enable for address pipeline Address, data, and control registers Internally self-timed WRITE CYCLE Burst control pins (interleaved or linear burst sequence)
- Automatic power-down for portable applications
- High-density, high-speed packages
- JTAG boundary scan for BGA packaging version (CLK). The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE), burst control in, and ADV), Write Enables (BWa, BWb, puts (ADSC, ADSP BWc, BWd and BWE), and global write (GW). Asynchronous inputs include the output enable (OE) and Burst Mode Control (MODE). The data (DQa,b,c,d) and the data parity (DQPa,b,c,d) outputs, enabled by OE, are also asynchronous. DQa,b,c,d and...
