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CY7C1372B Datasheet (cy7c1370b / Cy7c1372b) 512k X 36/1m X 18 Pipelined Sram

Manufacturer: Cypress (now Infineon)

Overview: CY7C1370B CY7C1372B 512K × 36/1M × 18 Pipelined SRAM with NoBL.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • Zero Bus Latency, no dead cycles between Write and Read cycles.
  • Fast clock speed: 200, 167, 150, and 133 MHz.
  • Fast access time: 3.0, 3.4, 3.8, and 4.2 ns.
  • Internally synchronized registered outputs eliminate the need to control OE.
  • Single 3.3V.
  • 5% and +10% power supply VDD.
  • Separate VDDQ for 3.3V or 2.5V I/O.
  • Single WE (Read/Write) control pin.
  • Positive clock-edge triggered address, data, and control signal register.

Similar Datasheet

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More Datasheets from Cypress (now Infineon)

Part Number Description
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CY7C1372KV33 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
CY7C1372KVE33 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
CY7C1370B (CY7C1370B / CY7C1372B) 512K X 36/1M X 18 Pipelined SRAM
CY7C1370DV25 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
CY7C1370KV25 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
CY7C1370KV33 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
CY7C1370KVE33 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
CY7C1371B (CY7C1371B / CY7C1373B) 512K x 36/1M x 18 Flow-Thru SRAM

CY7C1372B Distributor