Datasheet Summary
..
1CY7C1347
128K x 36 Synchronous-Pipelined Cache RAM
Features
- Supports 100-MHz bus for Pentium and PowerPC™ operations with zero wait states
- Fully registered inputs and outputs for pipelined operation
- 128K by 36 mon I/O architecture
- 3.3V core power supply
- 2.5V/3.3V I/O operation
- Fast clock-to-output times
- 3.5 ns (for 166-MHz device)
- 4.0 ns (for 133-MHz device)
- -
- -
- -
- - 5.5 ns (for 100-MHz device) User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences Separate processor and controller address strobes Synchronous self-timed writes Asynchronous output enable JEDEC-standard 100 TQFP pinout “ZZ”...