CY7C1345G sram equivalent, 4-mbit flow-through sync sram.
* 128K × 36 common I/O
* 3.3 V core power supply (VDD)
* 2.5 V or 3.3 V I/O supply (VDDQ)
* Fast clock-to-output times
* 8.0 ns (100 MHz version)
.
The CY7C1345G is a 128K × 36 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. The maximum access delay from clock rise is 8.0 ns (100 MHz version). A 2-bit on-chip counter captures the first address.
Image gallery
TAGS